Raypodo Digital Signage Product’s Chipset Introduction

Rockchip RK3288 chipset

The world is in the grips of a global chip shortage because of demand for semiconductors surging far

beyond capacity for supply. The shortage is crippling players in industries as diverse and far afield as

automotive and smartphones—though carmakers have it the worst.–Source from FORTUNE

IDC is projecting strong growth in PC shipments for 2021 even though processors are in short supply.

The wild card is whether there will be enough chips for other parts such as power management

available.–Source from ZDNet

Base on the above report, as we know, we are suffering the Chipset shortage in 2021 and not know

when the global chipset shortage will end. On Feb. 24, 2021. The U.S. President Joe Biden signed

an executive order calling for a review of the U.S. semiconductor supply chain and Biden is also

seeking $37 billion in funding to ramp up domestic chip production.

Why the chipset shortage?

Raypodo Digital signage, All-in-One PC, PC computer, and other trading accessory products,

which all need chipset to build up. Base on the feedback from our suppliers feedback, we figure

out the reason why we have chipset shortage.

COVID-19 impact

We are impacted by the Virus, even the whole world people are suffering the virus. Factory close

and less production capacity make the chipset production capacity shortage. Chipset supply chain

China–United States trade war

The trading war started from the year 2018. The U.S. government required that relevant chipset

corporate be prohibited from exporting chips to China.

Growth in demand for new energy vehicles

Nowadays, the sales of new energy vehicles are increasing day by day. Companies that have built

cars and companies that have not built cars and want to build cars have all seen this market.

Can’t wait to invest in this industry. As the Automotive Manufacturing has huge demand request

for the chipset and they have reasonable and good buying in the price for the chipset. The chipset

corporates are more willing to sell chips to car manufactories. As a result, other industries that

need chips are in short supply.

What kind of Chipset Raypodo product use?

Raypodo digital signage products use the Rockchip company chips. The following is about

RK3288 introduction.

Overview

RK3288 are low power, high-performance processor for mobile phones, personal mobile

internet device and other digital multimedia applications, and integrates quad-core Cortex

A17 with separately NEON coprocessor.

Many embedded powerful hardware engines provide optimized performance for high-end

application. RK3288 supports almost full-format; include H.265 decoder by 2160p@60fps,

H.264 decoder by 2160p@24fps, also support H.264/MVC/VP8 encoder by 1080p@30fps,

high-quality JPEG encoder/decoder, and special image preprocessor and postprocessor.

Embedded 3D GPU makes RK3288 completely compatible with OpenGL ES1.1/2.0/3.0,

OpenCL 1.2 and DirectX 11. Special 2D hardware engine with MMU will maximize display

performance and provide very smoothly operation.

RK3288 has high-performance dual channel external memory interface (DDR3/DDR3L

/LPDDR2/LPDDR3) capable of sustaining demanding memory bandwidth, also provides a

complete set of peripheral interface to support very flexible applications.

RK3288 LOT NO# end with “W” is upgraded version, could support HDCP2.2 and USB 1.1.

Features

The features listed below which may or may not be present in actual product, may be

subject to the third party licensing requirements. Please contact Rockchip for actual product

feature configurations and licensing requirements.

MicroProcessor

Quad-core ARM Cortex-A17 MPCore processor, a high-performance, low-power and

cached application processor

Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced

SIMD (single instruction, multiple data) support for accelerated media and signal

processing computation

Superscalar, variable length, out-of-order pipeline with dynamic branch prediction, 8-

stage pipeline

Include VFP v3 hardware to support single and double-precision add, subtract, divide,

multiply and accumulate, and square root operations

SCU ensures memory coherency between the four CPUs
Integrated 32KB L1 instruction cache , 32KB L1 data cache with 4-way set associative
1MB unified L2 Cache
Trust zone technology support
Full coresight debug solution
- Debug and trace visibility of whole systems
- ETM trace support
- Invasive and non-invasive debug

Six separate power domains for every core to support internal power switch and

externally turn on/off based on different application scenario

- PD_A17_0: 1st Cortex-A17 + Neon + FPU + L1 I/D Cache
- PD_A17_1: 2ndCortex-A17 + Neon + FPU + L1 I/D Cache
- PD_A17_2: 3rdCortex-A17 + Neon + FPU + L1 I/D Cache
- PD_A17_3: 4thCortex-A17 + Neon + FPU + L1 I/D Cache
- PD_SCU: SCU + L2 Cache controller, and including PD_A17_0, PD_A17_1,
- PD_A17_2, PD_A17_3, debug logic
One isolated voltage domain to support DVFS

Memory Organization

Internal Memory

Internal on-chip memory
- BootRom
- Internal SRAM for security and non-security access
External off-chip memory①
- Dual channel DDR3/DDR3L
- Dual channel LPDDR2
- Dual channel LPDDR3
- Dual channel async Nand Flash(include LBA Nand)
- Single channel async Nand Flash(include LBA Nand)
- Dual channel sync ONFI/toggle Nand Flash
Internal BootRom
- Size : 20KB
- Support system boot from the following device :
  - 8bits Async Nand Flash
  - 8bits Toggle Nand Flash
  - SPI interface
  - eMMC interface
  - SDMMC interface
- Support system code download by the following interface:
  - USB OTG interface
Internal SRAM
- Size : 100KB
- Support security and non-security access
- Security or non-security space is software programmable
- Security space can be 0KB,4KB,8KB,12KB,16KB, … up to 96KB by 4KB step

External Memory or Storage device

Dynamic Memory Interface (DDR3/DDR3L/LPDDR2/LPDDR3)

Compatible with JEDEC standard DDR3-1333/DDR3L-1333/LPDDR2-1066/LPDDR3-1066 SDRAM
Support 2 channel, each channel 16 or 32bits data widths
Support up to 2 ranks (chip selects) for each channel, totally 4GB (max) address space, maximum address space for one rank of channel 0 is also 4GB, which is software-configurable.
16bits/32bits data width is software programmable
Programmable timing parameters to support DDR3/DDR3L/LPDDR2/LPDDR3 SDRAM from various vendor
Advanced command reordering and scheduling to maximize bus utilization
Low power modes, such as power-down and self-refresh for DDR3/LPDDR2/LPDDR3 SDRAM; clock stop and deep power-down for LPDDR2 SDRAM
Embedded dynamic drift detection in the PHY to get dynamic drift compensation with the controller
Programmable output and ODT impedance with dynamic PVT compensation
Support one low-power work mode: power down DDR PHY and most of DDR IO except two cs and cke output signals, make SDRAM still in self-refresh state to prevent data missing.

Nand Flash Interface

Support dual channel async Nand Flash, each channel 8bits, up to 4 banks
Support dual channel sync DDR Nand Flash, each channel 8bits, up to 4 banks
Support LBA Nand Flash in async or sync mode
Up to 60bits hardware ECC
For ToggleNand Flash, support DLL bypass and 1/4 or 1/8 clock adjust, maximumclock rate is 75MHz
For async Nand Flash, support configurable interface timing , maximum data rate is 16bit/cycle
Embedded special DMA interface to do data transfer
Also support data transfer together with general PERI_DMAC in SoC system

eMMC Interface

Compatible with standard iNAND interface
Support MMC4.5 protocol
Provide eMMC boot sequence to receive boot data from external eMMC device
Support FIFO over-run and under-run prevention by stopping card clock automatically
Support CRC generation and error detection
Embedded clock frequency division control to provide programmable baud rate
Support block size from 1 to 65535Bytes
8bits data bus width

SD/MMC Interface

Compatible with SD3.0, MMC ver4.5
Support FIFO over-run and under-run prevention by stopping card clock automatically
Support CRC generation and error detection
Embedded clock frequency division control to provide programmable baud rate
Support block size from 1 to 65535Bytes
Data bus width is 4bits